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Tighten external STEP solid count guards#96

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digzrow-coder:codex/external-step-solid-guards-6
Open

Tighten external STEP solid count guards#96
digzrow-coder wants to merge 1 commit into
tscircuit:mainfrom
digzrow-coder:codex/external-step-solid-guards-6

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@digzrow-coder

@digzrow-coder digzrow-coder commented May 14, 2026

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/claim #6

Contributes to #6

Summary:

  • tighten basics06 so the external STEP-only fixture must emit exactly the board plus two unique external model solids
  • tighten the KiCad STEP merge repro so it must emit exactly one board solid plus one reusable solid per unique external STEP model
  • keep the existing mapped-instance checks so duplicated component placements still validate through MAPPED_ITEM

This is a narrow regression guard for the external STEP merge path; it does not overlap with the generated component-box solid count guard or pcb_component fallback-box implementation PRs.

Demo:
https://github.com/digzrow-coder/circuit-json-to-step/releases/download/pr-96-demo-20260515/pr-96-external-step-solid-guards-demo.mp4

Tests:

  • bun test test\basics\basics06\basics06.test.ts test\repros\kicad-step\kicad-step.test.ts
  • bun test --timeout 30000 test\get-circuit-json-to-gltf-module.test.ts
  • bun test
  • bun x tsc --noEmit
  • bun x biome format test/basics/basics06/basics06.test.ts test/repros/kicad-step/kicad-step.test.ts
  • bun run build
  • git diff --check

Local verification rerun before adding the demo:

  • focused basics06 + kicad-step command: 4 pass, 0 fail
  • get-circuit-json-to-gltf-module with explicit 30s timeout: 1 pass, 0 fail

Note: GitHub code checks are green (test, format-check, type-check). The remaining Vercel status is the tscircuit team authorization gate, not a branch code failure.

AI-assisted with OpenAI Codex; I reviewed the diff, proof asset, and validation output before posting.

@vercel

vercel Bot commented May 14, 2026

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@Digz0 is attempting to deploy a commit to the tscircuit Team on Vercel.

A member of the Team first needs to authorize it.

@digzrow-coder

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The only failing status is Vercel team authorization for the tscircuit org. The code checks that are actionable from this PR are green:

  • test: success
  • format-check: success
  • type-check: success

So the remaining Vercel failure appears to require maintainer authorization rather than a code change in this branch.

@digzrow-coder

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Added the short demo video requested by the bounty instructions:

https://github.com/digzrow-coder/circuit-json-to-step/releases/download/pr-96-demo-20260515/pr-96-external-step-solid-guards-demo.mp4

It shows the exact regression this PR guards: external STEP output must have the board plus the expected unique model solids, and duplicate component placements must stay as MAPPED_ITEM references instead of duplicated solids.

Local verification rerun before posting:

  • bun test test\basics\basics06\basics06.test.ts test\repros\kicad-step\kicad-step.test.ts -> 4 pass, 0 fail
  • bun test --timeout 30000 test\get-circuit-json-to-gltf-module.test.ts -> 1 pass, 0 fail

GitHub code checks are still green (test, format-check, type-check). The remaining Vercel status is the tscircuit team authorization gate, not a branch code failure.

AI-assisted with OpenAI Codex; I reviewed the video and reran the local verification above before posting.

colorbank added a commit to colorbank/circuit-json-to-step that referenced this pull request May 16, 2026
…uit#6 regression

Tighten STEP regression coverage for two board-only fixtures that were
previously guarded only by a loose `meshes.length > 0` OCCT import check.

repro02 (rotated-pill hole board):
- Adds `solidCount = 1` assertion to guard against the complex
  rotated-pill hole cutting code fragmenting the board into multiple
  MANIFOLD_SOLID_BREP entities or spuriously generating component boxes
  for source_components that have no pcb_component entry.

repro03 (hole-wrapper component exclusion):
- Adds MANIFOLD_SOLID_BREP presence check (previously absent).
- Adds `solidCount = 1` assertion to guard against hole-wrapper
  pcb_components (subcircuit containers) incorrectly receiving fallback
  component boxes. If such a regression reoccurs, solidCount would jump
  above 1 and the test would fail.

Both paths are non-overlapping with the existing open guards:
- basics04 / repro01  → component box counts (PRs tscircuit#94, tscircuit#97)
- basics06 / kicad-step → external STEP model counts (PR tscircuit#96)

/claim tscircuit#6
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